2ED21064S06JXUMA1 vs 2ED21084S06JXUMA1 Comparison
Detailed side-by-side comparison of 2ED21064S06JXUMA1 by Infineon and 2ED21084S06JXUMA1 by Infineon. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Infineon
2ED21064S06JXUMA1
2ED21064S06JXUMA1 - 650V 0.7A Half-Bridge Gate Driver | Infineon
2ED21064S06JXUMA1 β ActiveInfineon
2ED21084S06JXUMA1
2ED21084S06JXUMA1 - 650V 0.7A Half-Bridge Gate Driver | Infineon
2ED21084S06JXUMA1 β ActiveSpecification Comparison
| Parameter | 2ED21064S06JXUMA1 | 2ED21084S06JXUMA1 |
|---|---|---|
| Brand | Infineon | Infineon |
| Category | Power MOSFET Drivers | Power MOSFET Drivers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.85 | $0.55 |
| Function | High-Side and Low-Side Gate Driver | Half-bridge gate driver |
| Configuration | Half-Bridge (2 outputs, non-inverting) | β |
| Topology | High-Side, Low-Side with integrated bootstrap diode | Half-bridge (high-side + low-side) |
| Maximum Offset / Boot Voltage | 650 V | β |
| Supply Voltage (VCC) | 10 V to 20 V | β |
| Source Current (typical) | 0.29 A | 0.29 A |
| Sink Current (typical) | 0.7 A | 0.7 A |
| Rise Time (typical) | [DATA_NEEDED: rise time] | β |
| Fall Time (typical) | [DATA_NEEDED: fall time] | β |
| Propagation Delay (typical) | 100 ns | β |
| Channel-to-Channel Delay Match | [DATA_NEEDED: channel-to-channel delay match] | β |
| Under-Voltage Lockout | Yes (both channels) | β |
| Bootstrap Diode | Integrated | Integrated |
| Input Logic Compatibility | 3.3 V / 5 V CMOS | β |
| Operating Temperature | -40C to +125C | -40C to +125C |
| Package | PG-DSO-14 (14-pin SOIC) | PG-DSO-14-49 (14-pin wide-body SOIC) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | 3 |
| RoHS Status | ROHS3 Compliant | Compliant |
| Negative Gate Drive Robustness | -0.7 V | β |
| High-side Offset Voltage (max) | β | 650 V |
| VCC Supply Voltage | β | 10 V to 20 V |
| Propagation Delay Rise (typical) | β | 100 ns |
| Propagation Delay Fall (typical) | β | 35 ns |
| Input Logic | β | Non-inverting (HIN/LIN) |
| UVLO (VCC) | β | [DATA_NEEDED: VCC UVLO threshold] |
| UVLO (VBS) | β | [DATA_NEEDED: VBS UVLO threshold] |