EP1C6T144I6ES vs EP1C6T144C7N Comparison
Detailed side-by-side comparison of EP1C6T144I6ES by Intel and EP1C6T144C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1C6T144I6ES | EP1C6T144C7N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.95 | $18.40 |
| Family | Cyclone | Cyclone |
| Logic Elements (LEs) | 5,980 | β |
| Logic Array Blocks (LABs) | 598 (10 LEs per LAB) | β |
| Maximum Internal Frequency | 405 MHz | β |
| Total RAM Bits | 92,160 (approx 92 Kbits) | 92160 |
| Embedded Multipliers | 0 (not supported in this generation) | β |
| PLLs | 2 | β |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O for TQFP-144 variant] | β |
| Package | TQFP-144 (22 x 22 mm, 0.5 mm pitch, gull-wing, lead-free) | 144-TQFP (TQFP-144) |
| Package Code (JEDEC) | LFQFP | β |
| Maximum Seated Height | 1.6 mm | β |
| Core Voltage | 1.5 V (typ) | β |
| Operating Temperature Range | -40C to +100C (industrial, 'I' suffix) | β |
| Speed Grade | I6 (industrial, slowest grade) | β |
| Configuration Interface | JTAG, Passive Serial (PS), EPC configuration devices | β |
| Process Node | 0.13 um SRAM | β |
| Lead-Free / RoHS | Yes (lead-free, RoHS compliant per Verified Web Data) | β |
| Supported I/O Standards | LVTTL, LVCMOS, LVDS, SSTL-2, SSTL-3 | β |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating not in Verified Web Data] | β |
| Series | β | Cyclone I |
| Manufacturer | β | Altera (Intel) |
| Logic Elements | β | 5980 |
| Logic Cells / CLBs | β | 5980 |
| Number of I/Os | β | 98 |
| Number of LABs/CLBs | β | 598 |
| Operating Voltage (Core) | β | 1.5 V |
| Operating Voltage (I/O) | β | 3.3 V (LVCMOS/LVTTL) |
| Maximum Operating Frequency | β | 320 MHz |
| Process Technology | β | CMOS, 130 nm |
| Number of PLLs | β | 2 |
| Package Size | β | 22 x 22 mm |
| Lead Pitch | β | 0.5 mm |
| Operating Temperature | β | 0C to +85C (commercial) |
| Configuration Modes | β | PS, AS, JTAG |
| RoHS Status | β | Compliant |