EP1M120B484C6 vs EP1M120B484C5 Comparison

Detailed side-by-side comparison of EP1M120B484C6 by Intel and EP1M120B484C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1M120B484C6 EP1M120B484C5
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $55.00 $65.00
Family Mercury (ACEX 1M) Mercury (EP1M)
Logic Elements (typical) 120 LE β€”
Maximum Logic Elements [DATA_NEEDED: maximum logic elements] β€”
Flip-Flops 4,800 β€”
User I/O Pins (max) 303 β€”
Configuration Memory SRAM-based (volatile, re-load on power-up) β€”
Package 484-ball FineLine BGA (BGA-484) FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch)
Mounting Type Surface Mount Surface Mount
Peak Reflow Temperature 220 Β°C 220 C
Operating Temperature Grade Commercial (C suffix) β€”
Process Node 0.18 Β΅m β€”
JTAG Support IEEE 1149.1 boundary-scan β€”
Configuration Modes PS, AS, JTAG β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Design Software Quartus II (legacy support required) β€”
Logic Elements β€” 4,800
Typical Gates β€” 120,000
Maximum User I/O β€” 303
Operating Temperature β€” 0C to +85C (commercial)
Speed Grade β€” 5 (slowest)
Core Voltage β€” 1.8 V
Process Technology β€” 0.18 um CMOS
PLLs β€” 4
Embedded RAM Bits β€” 49,152
True LVDS Channels β€” Up to 34 pairs
Maximum LVDS Data Rate β€” 840 Mbps per channel
Configuration Scheme β€” Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG
Lead-Free / RoHS β€” SnPb ball finish (non-RoHS by default)
Multipliers β€” Embedded in system blocks for DSP

Datasheets & Resources

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