EP1M350F780C7ES vs EP1M350F780C6N Comparison

Detailed side-by-side comparison of EP1M350F780C7ES by Intel and EP1M350F780C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP1M350F780C7ES EP1M350F780C7ES - 486-I/O Mercury FPGA | Intel

EP1M350F780C7ES - 486-I/O Mercury FPGA | Intel

EP1M350F780C7ES βœ“ Active

Specification Comparison

Parameter EP1M350F780C7ES EP1M350F780C6N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $219.40
Product Type Field Programmable Gate Array (FPGA) β€”
Logic Family CMOS CMOS, SRAM-based LUT
User I/O Count 486 pins β€”
Total Package Pins 780 pins β€”
Package Type FINE LINE BGA-780 β€”
Package Category 780-BBGA β€”
Supply Voltage 1.8 V β€”
Maximum Stated Transceiver Data Rate 1.25 Gbps β€”
Channels Supported at 1.25 Gbps 8 channels β€”
Remaining Channel Limit 10 channels at 1.0 Gbps or less β€”
Operating Temperature 0 C to 85 C 0 C to 85 C
Clock Data Recovery Supported β€”
High-Speed Transceivers Integrated β€”
Mounting Type Surface Mount β€”
RoHS Status unknown [DATA_NEEDED: rohs_status]
REACH Status unknown β€”
Logic Element Count [DATA_NEEDED: logic element count] β€”
Embedded Memory Capacity [DATA_NEEDED: embedded memory capacity] β€”
Transceiver Count [DATA_NEEDED: transceiver count] β€”
Package Dimensions [DATA_NEEDED: package dimensions] β€”
Thermal Resistance [DATA_NEEDED: junction-to-ambient thermal resistance] β€”
Family β€” Mercury (EP1M350)
Device Type β€” Loadable Programmable Logic Device (PLD) / FPGA
System Gates β€” 350,000
Logic Cells / Elements β€” 14,400
User I/Os β€” 486
Integrated Transceivers β€” Yes, with CDR up to 1.25 Gbps
Core Supply Voltage β€” 1.8 V
Package β€” 780-ball FC-FBGA (FINE LINE BGA-780)
Terminal Form β€” Ball
Package Code (JEDEC) β€” S-PBGA-B780
Configuration Interface β€” JTAG (IEEE 1149.1) / passive serial
MSL Level β€” [DATA_NEEDED: msl_level]
Lead-Free β€” [DATA_NEEDED: lead_free]
Architecture β€” Look-up table (LUT)-based, optimized for high-speed serial I/O
Total Package Pins / Balls β€” 780

Datasheets & Resources

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