EP1S10B672C7 vs EP1S10F672C6 Comparison
Detailed side-by-side comparison of EP1S10B672C7 by Intel and EP1S10F672C6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S10B672C7 | EP1S10F672C6 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $140.00 | $72.00 |
| Manufacturer | Intel (formerly Altera) | โ |
| Series | Stratix | Stratixยฎ I |
| Logic Elements | 10,570 | โ |
| Embedded Memory (Total) | 920 Kbits | โ |
| DSP Blocks | Yes (DSP multiplier blocks) | 6 |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | โ |
| Process Technology | 0.13 ยตm CMOS | 130 nm CMOS |
| Supply Voltage (Core) | 1.5 V | โ |
| Package Type | 672-ball FineLine BGA | โ |
| Package Dimensions | 35 x 35 mm | โ |
| Ball Pitch | 1.27 mm | โ |
| Logic Family | CMOS | โ |
| Operating Temperature | 0 ยฐC to 85 ยฐC (Commercial) | 0C to +85C (Commercial) |
| Temperature Grade | Commercial (C) | โ |
| Speed Grade | 7 | โ |
| Configuration Method | JTAG / EPC serial configuration | โ |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Family | โ | Stratix FPGA |
| Logic Elements (LE) | โ | 10,570 |
| Logic Array Blocks (LABs) | โ | 1057 |
| Total Memory Bits | โ | 920,448 bits |
| Embedded Memory | โ | TriMatrix (MRAM/M4K) |
| Number of I/Os | โ | 345 |
| Number of PLLs | โ | 12 (6 per device side) |
| Core Voltage | โ | 1.5 V |
| Package | โ | 672-ball FineLine BGA (FBGA) |
| Maximum Core Frequency | โ | 420.17 MHz |
| Configuration Modes | โ | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| JTAG Support | โ | IEEE 1149.1 boundary-scan |