EP1S10B672C7 vs EP1S10F672C7 Comparison
Detailed side-by-side comparison of EP1S10B672C7 by Intel and EP1S10F672C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S10B672C7 | EP1S10F672C7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $140.00 | $158.00 |
| Manufacturer | Intel (formerly Altera) | β |
| Series | Stratix | β |
| Logic Elements | 10,570 | 10,570 |
| Embedded Memory (Total) | 920 Kbits | β |
| DSP Blocks | Yes (DSP multiplier blocks) | β |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | β |
| Process Technology | 0.13 Β΅m CMOS | 130 nm CMOS |
| Supply Voltage (Core) | 1.5 V | β |
| Package Type | 672-ball FineLine BGA | β |
| Package Dimensions | 35 x 35 mm | 35 x 35 mm, 1.27 mm pitch |
| Ball Pitch | 1.27 mm | β |
| Logic Family | CMOS | β |
| Operating Temperature | 0 Β°C to 85 Β°C (Commercial) | 0 C to 85 C (Commercial) |
| Temperature Grade | Commercial (C) | β |
| Speed Grade | 7 | β |
| Configuration Method | JTAG / EPC serial configuration | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | unknown |
| Mounting Type | Surface Mount | Surface Mount |
| Family | β | Stratix |
| Embedded Memory | β | 920,448 bits |
| User I/Os | β | 345 |
| Package | β | 672-pin FBGA (FineLine BGA) |
| Core Voltage (VCCINT) | β | 1.5 V |
| Logic Cells | β | 10,570 |
| LABs (Logic Array Blocks) | β | 1,057 |
| I/O Standards | β | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Configuration Mode | β | JTAG, Passive Serial, Active Serial |