EP1S10F484C5N vs EP1S10F484I6N Comparison
Detailed side-by-side comparison of EP1S10F484C5N by Intel and EP1S10F484I6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1S10F484C5N
EP1S10F484C5N - Stratix 10570 LEs FPGA 484-FBGA | Intel / Altera
EP1S10F484C5N ObsoleteIntel
EP1S10F484I6N
EP1S10F484I6N - Stratix 10,570 LEs FPGA 484-FBGA | Intel (Altera)
EP1S10F484I6N β Last Time BuySpecification Comparison
| Parameter | EP1S10F484C5N | EP1S10F484I6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $52.00 | $305.20 |
| Series | Stratix | β |
| Family | Stratix (original) | Stratix |
| Logic Elements (LEs) | 10,570 | β |
| Logic Array Blocks (LABs) | 1,057 | 1,057 |
| Embedded Memory Bits | 920,448 | β |
| TriMatrix Memory Blocks | 14 | β |
| Embedded DSP Blocks | 6 (β48 9-bit multipliers) | β |
| PLLs | 4 | β |
| Global Clock Networks | 12 | β |
| Maximum User I/O | 335 | 335 |
| User I/O Standard Support | LVDS, LVPECL, PCI-X, RapidIO, DDR | β |
| Process Technology | 0.13 Β΅m CMOS | 130 nm CMOS |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| Maximum Internal Frequency | 500 MHz (per Stratix datasheet) | β |
| Operating Temperature (TJ) | 0 Β°C to 85 Β°C (Commercial) | β |
| Package | 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch | 484-ball FBGA (FCBGA), 23 x 23 mm, 1 mm pitch |
| Mounting Type | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Configuration Method | JTAG / Passive Serial / Active Serial | β |
| Device Status | Obsolete - last time buy completed | β |
| Design Toolchain | Quartus II (β€ v13.0) | β |
| Logic Elements | β | 10,570 |
| Adaptive Logic Modules (ALMs) | β | [DATA_NEEDED: ALM count] |
| Embedded Memory (Bits) | β | 920,448 |
| DSP Blocks | β | 48 |
| Number of PLLs | β | 6 |
| Operating Temperature | β | 0C to +85C (Industrial) |
| Peak Reflow Temperature | β | 245 C |
| Configuration Interface | β | JTAG (IEEE 1149.1), Passive Serial, Active Serial |
| Internal Core Speed | β | up to 450 MHz |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |
| Logic Family | β | CMOS |
| Terminal Finish | β | Tin-Silver-Copper (SnAgCu) |