EP1S10F484C6N vs EP1S10F484C5N Comparison

Detailed side-by-side comparison of EP1S10F484C6N by Intel and EP1S10F484C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S10F484C6N EP1S10F484C5N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $226.31 $52.00
Family Stratix Stratix (original)
Logic Elements / Cells 10,570 β€”
Number of LABs / CLBs 1,057 β€”
Total RAM Bits 920,448 β€”
Number of User I/O 335 β€”
Package 484-FBGA (23 Γ— 23 mm, 1.0 mm pitch) 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch
Process Technology 130 nm CMOS 0.13 Β΅m CMOS
Supply Voltage - Operating 1.425 V to 1.575 V (core 1.5 V) β€”
Speed Grade C6 β€”
Operating Temperature 0 Β°C to 85 Β°C (TJ) β€”
Mounting Type Surface Mount (SMT) Surface Mount
Lead Free Yes β€”
Configuration Method SRAM - volatile (JTAG / passive serial / passive parallel / fast passive parallel) JTAG / Passive Serial / Active Serial
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS β€”
On-chip Resources TriMatrix memory (M512, M4K, M-RAM), DSP blocks, PLLs β€”
Series β€” Stratix
Logic Elements (LEs) β€” 10,570
Logic Array Blocks (LABs) β€” 1,057
Embedded Memory Bits β€” 920,448
TriMatrix Memory Blocks β€” 14
Embedded DSP Blocks β€” 6 (β‰ˆ48 9-bit multipliers)
PLLs β€” 4
Global Clock Networks β€” 12
Maximum User I/O β€” 335
User I/O Standard Support β€” LVDS, LVPECL, PCI-X, RapidIO, DDR
Core Voltage (VCCINT) β€” 1.5 V
Maximum Internal Frequency β€” 500 MHz (per Stratix datasheet)
Operating Temperature (TJ) β€” 0 Β°C to 85 Β°C (Commercial)
Device Status β€” Obsolete - last time buy completed
Design Toolchain β€” Quartus II (≀ v13.0)

Datasheets & Resources

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