EP1S10F672C7N vs EP1S10B672C7N Comparison

Detailed side-by-side comparison of EP1S10F672C7N by Altera and EP1S10B672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S10F672C7N EP1S10B672C7N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $171.00 $67.90
Series Stratix β€”
Logic Elements / Cells 10,570 β€”
Number of LABs/CLBs 1,057 β€”
Total RAM Bits 920,448 [DATA_NEEDED: total RAM bits]
Number of User I/Os 345 β€”
Number of Gates [DATA_NEEDED: total gate count] β€”
DSP Blocks 6 β€”
Package Type 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch β€”
Mounting Type Surface Mount β€”
Process Technology 130 nm CMOS β€”
Core Voltage 1.5 V β€”
Maximum Operating Frequency 420.17 MHz β€”
Operating Temperature 0C to +85C (Commercial) β€”
Configuration Method SRAM, JTAG, passive/active serial/parallel β€”
RoHS Status [DATA_NEEDED: RoHS compliance] β€”
MSL Level [DATA_NEEDED: MSL moisture sensitivity level] β€”
Manufacturer β€” Intel / Altera
Product Family β€” Stratix
Logic Family β€” CMOS
Logic Elements/Cells β€” 10570 cells
Maximum Internal Clock β€” 420.17 MHz
Core Supply Voltage β€” 1.5 V
Technology Node β€” 130 nm
Package Code β€” BGA
Number of Terminals β€” 672
Package Body Size β€” 35 x 35 mm
Ball Pitch β€” 1.27 mm
Package Shape β€” Square
Temperature Grade β€” Commercial extended, 0 to 85 C
Terminal Form β€” Ball
Configuration/JTAG β€” JTAG boundary-scan per Stratix family data sheet
Number of User I/O in 672-BGA β€” [DATA_NEEDED: user I/O count]
Embedded PLLs β€” [DATA_NEEDED: PLL count]
Config Device Compatibility β€” [DATA_NEEDED: supported configuration devices]
RoHS β€” unknown - N suffix may indicate Pb-free, not verified in fetched data

Datasheets & Resources

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