EP1S10F672I7N vs EP1S10F672C6 Comparison
Detailed side-by-side comparison of EP1S10F672I7N by Intel and EP1S10F672C6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S10F672I7N | EP1S10F672C6 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $118.00 | $72.00 |
| Family | Stratix | Stratix FPGA |
| Logic Elements | 10,570 | โ |
| Logic Array Blocks (LABs) | 1,057 | 1057 |
| User I/Os | 345 | โ |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | โ |
| Maximum Internal Frequency | 420.17 MHz | โ |
| Operating Temperature | 0C to 85C | 0C to +85C (Commercial) |
| Package | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA (FBGA) |
| Logic Family | CMOS | โ |
| Embedded Memory | 920 Kbits (TriMatrix) | TriMatrix (MRAM/M4K) |
| DSP Blocks | Yes (dedicated) | 6 |
| Configuration Interface | Active Serial / Passive Serial / JTAG | โ |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE 1149.1 boundary-scan |
| Speed Grade | I7 (industrial, -7 speed bin) | โ |
| MSL Level | 3 (per JEDEC J-STD-020, typical for BGA of this era) | โ |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED: per Intel PDN] | [DATA_NEEDED: RoHS status] |
| Series | โ | Stratixยฎ I |
| Logic Elements (LE) | โ | 10,570 |
| Total Memory Bits | โ | 920,448 bits |
| Number of I/Os | โ | 345 |
| Number of PLLs | โ | 12 (6 per device side) |
| Core Voltage | โ | 1.5 V |
| Maximum Core Frequency | โ | 420.17 MHz |
| Configuration Modes | โ | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |