EP1S10F672I7N vs EP1S10F672C7 Comparison
Detailed side-by-side comparison of EP1S10F672I7N by Intel and EP1S10F672C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S10F672I7N | EP1S10F672C7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $118.00 | $158.00 |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | 10,570 |
| Logic Array Blocks (LABs) | 1,057 | β |
| User I/Os | 345 | 345 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | β |
| Maximum Internal Frequency | 420.17 MHz | β |
| Operating Temperature | 0C to 85C | 0 C to 85 C (Commercial) |
| Package | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch | 672-pin FBGA (FineLine BGA) |
| Logic Family | CMOS | β |
| Embedded Memory | 920 Kbits (TriMatrix) | 920,448 bits |
| DSP Blocks | Yes (dedicated) | β |
| Configuration Interface | Active Serial / Passive Serial / JTAG | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| Speed Grade | I7 (industrial, -7 speed bin) | β |
| MSL Level | 3 (per JEDEC J-STD-020, typical for BGA of this era) | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: per Intel PDN] | unknown |
| Package Dimensions | β | 35 x 35 mm, 1.27 mm pitch |
| Core Voltage (VCCINT) | β | 1.5 V |
| Logic Cells | β | 10,570 |
| LABs (Logic Array Blocks) | β | 1,057 |
| I/O Standards | β | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Configuration Mode | β | JTAG, Passive Serial, Active Serial |