EP1S10F780I6N vs EP1S10F780C7N Comparison
Detailed side-by-side comparison of EP1S10F780I6N by Intel and EP1S10F780C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S10F780I6N | EP1S10F780C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $98.75 | $96.20 |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | β |
| Logic Array Blocks (LABs) | 1,057 | β |
| User I/Os | 426 | β |
| Embedded RAM (Total) | 920,448 bits | β |
| M512 Blocks | 94 (32 x 18 bits each) | β |
| M4K Blocks | 60 (128 x 36 bits each) | β |
| M-RAM Blocks | 1 (4 Kbit) | β |
| PLLs | 6 | β |
| Clock Outputs | 16 | β |
| DSP Blocks | 12 | β |
| Transceiver Channels | 12 (not populated on I6 speed grade) | β |
| Core Voltage (VCCINT) | 1.5 V | β |
| I/O Voltage (VCCIO) | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) | β |
| Process Technology | 0.13 Β΅m CMOS | 0.13 ΞΌm CMOS, 1.5 V core |
| Operating Temperature | -40 Β°C to +100 Β°C (industrial) | 0Β°C to 85Β°C (Commercial) |
| Speed Grade | -6 (6.0 ns core clock period) | C7 |
| Package | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch | FBGA-780 (29 Γ 29 mm, 1.0 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status not confirmed in verified data] |
| Configuration Modes | Active Serial (AS), Passive Serial (PS), JTAG | AS, PS, JTAG |
| Logic Family | CMOS | β |
| Supply Voltage Nominal | 1.5 V | β |
| Logic Elements (LEs) | β | 10,570 |
| Embedded Memory | β | 920 Kbits (TriMatrix: MLAB, M512, M4K) |
| Embedded Multipliers | β | Yes (DSP blocks) |
| PLLs / DLLs | β | 6 PLL + DLL blocks |
| User I/O Count | β | Up to 426 |
| Core Supply Voltage | β | 1.5 V |
| I/O Standards Supported | β | LVDS, LVPECL, SSTL, HSTL, LVCMOS, LVTTL |