EP1S20B672C7N vs EP1S20F672C7N Comparison
Detailed side-by-side comparison of EP1S20B672C7N by Intel and EP1S20F672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S20B672C7N | EP1S20F672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $320.00 | $109.20 |
| Series | Stratix | Stratix (first generation) |
| Family | Stratix (original) | Stratix |
| Process Technology | 0.13 Β΅m CMOS | 130 nm CMOS |
| Logic Elements (LEs) | 18,460 | 18,460 |
| LABs / CLBs | 1,846 | β |
| Embedded Memory Bits | 1,669,248 bits | β |
| Maximum User I/O | 426 | 586 |
| Number of Pins / Balls | 672 | β |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 Γ 35 mm, 1.27 mm pitch) | β |
| Supply Voltage (Core, VCCINT) | 1.5 V | β |
| Operating Temperature | 0 Β°C to 85 Β°C (Commercial Extended) | 0Β°C to +85Β°C (commercial) |
| Speed Grade | -7 | C7 (-7) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: moisture sensitivity level] |
| Logic Family | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Logic Cells | β | 18,460 |
| Configurable Logic Blocks (CLBs) | β | 2,132 |
| Embedded Memory (TriMatrix) | β | 1,669,248 bits (426 Kbit total) |
| DSP Blocks | β | 56 (dedicated 18x18 multipliers) |
| I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| PLLs | β | Up to 12 |
| Maximum Operating Frequency | β | 420.17 MHz |
| Core Voltage | β | 1.5 V |
| Package | β | 672-FBGA (FineLine BGA) |
| Package Body Size | β | 35 mm x 35 mm |
| Ball Pitch | β | 1.27 mm |
| Lead-Free / RoHS | β | Yes (lead-free finish, RoHS compliant) |
| Configuration Modes | β | PS, PPS, FPP, JTAG |