EP1S20B672C7N vs EP1S20F672I7 Comparison

Detailed side-by-side comparison of EP1S20B672C7N by Intel and EP1S20F672I7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S20B672C7N EP1S20F672I7
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $320.00 $199.50
Series Stratix β€”
Family Stratix (original) Stratix (first generation)
Process Technology 0.13 Β΅m CMOS β€”
Logic Elements (LEs) 18,460 18,460
LABs / CLBs 1,846 β€”
Embedded Memory Bits 1,669,248 bits β€”
Maximum User I/O 426 β€”
Number of Pins / Balls 672 672
Package Type 672-BBGA (Fine-pitch BGA, 35 Γ— 35 mm, 1.27 mm pitch) β€”
Supply Voltage (Core, VCCINT) 1.5 V β€”
Operating Temperature 0 Β°C to 85 Β°C (Commercial Extended) -40C to +85C (industrial grade, I7 suffix)
Speed Grade -7 β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level 3 (per JEDEC J-STD-020) unknown
Logic Family CMOS CMOS
RoHS Status [DATA_NEEDED: RoHS compliance] unknown
Lead-Free [DATA_NEEDED: lead-free status] β€”
Maximum RAM Bits β€” 1,669,248
DSP Blocks β€” [DATA_NEEDED: exact DSP block count]
Maximum User I/Os β€” 426
Supply Voltage (VCCINT core) β€” 1.5 V
Package β€” 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch
Configuration Modes β€” Passive Serial, Passive Parallel, JTAG
Clock Management PLLs β€” [DATA_NEEDED: PLL count]
Lead-Free / Finish β€” SnPb (e0 per Partstack datasheet extract)
Status β€” Last Time Buy (per distributor notices)

Datasheets & Resources

Browse All Products Create BOM Request Quote