EP1S20B672C7N vs EP1S25F672C7N Comparison
Detailed side-by-side comparison of EP1S20B672C7N by Intel and EP1S25F672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S20B672C7N | EP1S25F672C7N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $320.00 | $535.00 |
| Series | Stratix | β |
| Family | Stratix (original) | β |
| Process Technology | 0.13 Β΅m CMOS | 0.13 Β΅m CMOS |
| Logic Elements (LEs) | 18,460 | 25,660 |
| LABs / CLBs | 1,846 | β |
| Embedded Memory Bits | 1,669,248 bits | 1,944,576 |
| Maximum User I/O | 426 | 473 |
| Number of Pins / Balls | 672 | β |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 Γ 35 mm, 1.27 mm pitch) | β |
| Supply Voltage (Core, VCCINT) | 1.5 V | β |
| Operating Temperature | 0 Β°C to 85 Β°C (Commercial Extended) | 0 Β°C to 85 Β°C (commercial) |
| Speed Grade | -7 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Logic Family | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm from product page] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Family | β | Stratix |
| Logic Array Blocks (LABs) | β | 2,566 |
| Number of I/O Pins | β | 672 (BGA balls) |
| Package | β | 672-BBGA (FineLine BGA), 35 Γ 35 mm, 1.27 mm pitch |
| Core Supply Voltage (VCCINT) | β | 1.5 V |
| I/O Supply Voltage (VCCIO) | β | [DATA_NEEDED: bank-dependent 1.2 Vβ3.3 V] |
| Configuration Method | β | JTAG / Passive Serial / Active Serial |