EP1S20F672C7 vs EP1S20F484C7 Comparison
Detailed side-by-side comparison of EP1S20F672C7 by Intel and EP1S20F484C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S20F672C7 | EP1S20F484C7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $195.00 |
| Series | Stratix | EP1S20 |
| Family | Altera Stratix FPGA | Stratix |
| Logic Elements (LEs) | 18,460 | β |
| Embedded Memory Bits | 1,669,248 | β |
| User I/O Pins | 426 | β |
| DSP Blocks | [DATA_NEEDED: DSP block count] | β |
| Package | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 484-ball FC-FBGA |
| Logic Family | CMOS, SRAM-based | β |
| Core Supply Voltage | 1.5 V | β |
| Operating Temperature | 0C to 85C (commercial) | β |
| Speed Grade | C7 | C7 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | PS, PPS, PPA, JTAG |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Clock PLLs | Up to 10 | β |
| Process Technology | β | 130 nm CMOS |
| Core Voltage | β | 1.5 V |
| Logic Elements | β | 18,460 |
| Logic Array Blocks (LABs) | β | 1,846 |
| Total RAM Bits | β | 1,669,248 |
| Maximum I/O Pins | β | 361 |
| Package Size | β | 23 mm x 23 mm |
| Ball Pitch | β | 1.0 mm |
| Maximum Internal Frequency | β | 420.17 MHz |
| Operating Temperature Range | β | 0 C to +85 C (Commercial) |
| Programming Voltage | β | 1.5 V (in-system via JTAG) |