EP1S20F672I7 vs EP1S20F672C6 Comparison
Detailed side-by-side comparison of EP1S20F672I7 by Intel and EP1S20F672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 β Last Time Buy
Specification Comparison
| Parameter | EP1S20F672I7 | EP1S20F672C6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $199.50 | $470.00 |
| Family | Stratix (first generation) | Stratix (first generation) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | β |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | β |
| Maximum User I/Os | 426 | 426 |
| Supply Voltage (VCCINT core) | 1.5 V | β |
| Logic Family | CMOS | β |
| Package | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Operating Temperature | -40C to +85C (industrial grade, I7 suffix) | 0Β°C to +85Β°C (Commercial) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | β |
| Number of Pins / Balls | 672 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | β |
| MSL Level | unknown | β |
| Status | Last Time Buy (per distributor notices) | β |
| Manufacturer | β | Altera (now Intel) |
| Series | β | Stratix |
| Process Technology | β | 0.13 Β΅m CMOS |
| Logic Array Blocks (LABs) | β | 1,846 |
| Embedded Memory Bits | β | 1,669,248 |
| Package Code | β | F672 |
| Speed Grade | β | C6 |
| Supply Voltage | β | Core 1.5 V, I/O programmable |