EP1S20F672I7 vs EP1S20F672C7N Comparison
Detailed side-by-side comparison of EP1S20F672I7 by Intel and EP1S20F672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 β Last Time BuySpecification Comparison
| Parameter | EP1S20F672I7 | EP1S20F672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $199.50 | $109.20 |
| Family | Stratix (first generation) | Stratix |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | β |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | 56 (dedicated 18x18 multipliers) |
| Maximum User I/Os | 426 | β |
| Supply Voltage (VCCINT core) | 1.5 V | β |
| Logic Family | CMOS | β |
| Package | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | 672-FBGA (FineLine BGA) |
| Operating Temperature | -40C to +85C (industrial grade, I7 suffix) | 0Β°C to +85Β°C (commercial) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | PS, PPS, FPP, JTAG |
| Number of Pins / Balls | 672 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | β |
| RoHS Status | unknown | β |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | β |
| MSL Level | unknown | [DATA_NEEDED: moisture sensitivity level] |
| Status | Last Time Buy (per distributor notices) | β |
| Series | β | Stratix (first generation) |
| Logic Cells | β | 18,460 |
| Configurable Logic Blocks (CLBs) | β | 2,132 |
| Embedded Memory (TriMatrix) | β | 1,669,248 bits (426 Kbit total) |
| Maximum User I/O | β | 586 |
| I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| PLLs | β | Up to 12 |
| Maximum Operating Frequency | β | 420.17 MHz |
| Core Voltage | β | 1.5 V |
| Process Technology | β | 130 nm CMOS |
| Package Body Size | β | 35 mm x 35 mm |
| Ball Pitch | β | 1.27 mm |
| Speed Grade | β | C7 (-7) |
| Lead-Free / RoHS | β | Yes (lead-free finish, RoHS compliant) |