EP1S25B672C6N vs EP1S25B672C7N Comparison

Detailed side-by-side comparison of EP1S25B672C6N by Intel and EP1S25B672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S25B672C6N EP1S25B672C7N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $198.00 $620.15
Series Stratix β€”
Family Stratix FPGA Stratix
Manufacturer Intel (Altera) β€”
Logic Elements 25,660 β€”
Number of LABs/CLBs 2,566 β€”
Total RAM Bits 1,944,576 β€”
Number of I/O 473 β€”
Number of Pins/Terminals 672 β€”
Package Type 672-BBGA (35 x 35 mm, 1.27 mm pitch) 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch
Mounting Type Surface Mount (BGA) Surface Mount
Supply Voltage (Core) 1.5 V 1.5 V
Operating Temperature 0 C to +85 C (Commercial Extended) 0 Β°C to 85 Β°C (Commercial)
Process Technology 0.13 Β΅m CMOS 130 nm
Embedded Memory TriMatrix (M512, M4K, M-RAM) TriMatrix RAM blocks
DSP Blocks Yes (embedded multipliers) Yes (dedicated multiplier/accumulator)
Configuration Mode Serial/Parallel EPC, JTAG, CPU passive β€”
RoHS Status Unknown (legacy Stratix; consult distributor for specific date code) Compliant (per Intel/Altera product page)
Temperature Grade Commercial Extended β€”
Logic Elements / Cells β€” 25660
Number of User I/O β€” 473
Number of Pins β€” 672
Logic Family β€” CMOS
Maximum Operating Frequency β€” 420.17 MHz
Configuration Method β€” SRAM-based, JTAG (IEEE 1149.1)
I/O Standards Supported β€” LVTTL, LVCMOS, LVDS, SSTL, HSTL
PLLs β€” Yes (on-die)

Datasheets & Resources

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