EP1S25F1020C6N vs EP1S25F1020C5 Comparison
Detailed side-by-side comparison of EP1S25F1020C6N by Altera and EP1S25F1020C5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S25F1020C6N | EP1S25F1020C5 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $450.00 | $650.00 |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | β |
| Logic Cells | 25,660 | β |
| Embedded Memory (bits) | 1,944,576 | β |
| User I/O Pins | 706 | β |
| LABs (Logic Array Blocks) | 2,566 | β |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | β |
| Package | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA |
| Maximum Internal Clock Frequency | 450.05 MHz | β |
| Operating Temperature | 0C to +85C (Commercial) | β |
| Mounting Type | Surface Mount | Surface Mount (Flip-Chip BGA) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Method | JTAG or EPC configuration device | β |
| Family Generation | Stratix (1st generation) | β |
| Logic Elements | β | 25,660 |
| Logic Array Blocks (LABs) | β | 2,566 |
| Embedded Memory | β | 1,944,576 bits (1.94 Mbits) |
| User I/Os | β | 706 |
| Core Voltage | β | 1.5 V |
| Maximum Internal Frequency | β | 500 MHz |
| Speed Grade | β | C5 |
| Temperature Grade | β | Commercial Extended |
| Number of PLLs | β | 4 |
| DSP Blocks | β | Yes (dedicated multiply-accumulate) |
| Memory Interfaces Supported | β | DDR SDRAM, FCRAM, QDR SRAM, RLDRAM |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |