EP1S25F1020C6N vs EP1S25F1020I6N Comparison
Detailed side-by-side comparison of EP1S25F1020C6N by Altera and EP1S25F1020I6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S25F1020C6N | EP1S25F1020I6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $450.00 | $1,028.03 |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | β |
| Logic Cells | 25,660 | 25,660 |
| Embedded Memory (bits) | 1,944,576 | β |
| User I/O Pins | 706 | β |
| LABs (Logic Array Blocks) | 2,566 | β |
| Process Technology | 130 nm CMOS | β |
| Core Supply Voltage (VCCINT) | 1.5 V | β |
| Package | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA (33 Γ 33 mm, 1 mm pitch) |
| Maximum Internal Clock Frequency | 450.05 MHz | β |
| Operating Temperature | 0C to +85C (Commercial) | 0 Β°C to +85 Β°C (industrial, I6) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Configuration Method | JTAG or EPC configuration device | β |
| Family Generation | Stratix (1st generation) | β |
| Logic Array Blocks (LABs) | β | 2,566 |
| Embedded Memory | β | 1,944,576 bits |
| User I/Os | β | 706 |
| Maximum User I/O Pins | β | 706 |
| Core Voltage | β | 1.5 V |
| Technology Node | β | 130 nm CMOS |
| Pin Count | β | 1020 |
| Device Family | β | Stratix FPGA |
| Logic Family | β | CMOS |
| Lead-Free / RoHS | β | RoHS compliant per Altera / Intel product page |