EP1S25F672C7N vs EP1S20B672C7N Comparison
Detailed side-by-side comparison of EP1S25F672C7N by Altera and EP1S20B672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S25F672C7N | EP1S20B672C7N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $535.00 | $320.00 |
| Device Family | Stratix | β |
| Logic Elements (LEs) | 25,660 | 18,460 |
| Logic Array Blocks (LABs) | 2,566 | β |
| Embedded Memory Bits | 1,944,576 | 1,669,248 bits |
| Maximum User I/O | 473 | 426 |
| Number of I/O Pins | 672 (BGA balls) | β |
| Package | 672-BBGA (FineLine BGA), 35 Γ 35 mm, 1.27 mm pitch | β |
| Process Technology | 0.13 Β΅m CMOS | 0.13 Β΅m CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | β |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 Vβ3.3 V] | β |
| Operating Temperature | 0 Β°C to 85 Β°C (commercial) | 0 Β°C to 85 Β°C (Commercial Extended) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Configuration Method | JTAG / Passive Serial / Active Serial | β |
| MSL Level | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| RoHS Status | [DATA_NEEDED: confirm from product page] | [DATA_NEEDED: RoHS compliance] |
| Series | β | Stratix |
| Family | β | Stratix (original) |
| LABs / CLBs | β | 1,846 |
| Number of Pins / Balls | β | 672 |
| Package Type | β | 672-BBGA (Fine-pitch BGA, 35 Γ 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | β | 1.5 V |
| Speed Grade | β | -7 |
| Logic Family | β | CMOS |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |