EP1S25F672C8N vs EP1S25B672C7N Comparison

Detailed side-by-side comparison of EP1S25F672C8N by Intel and EP1S25B672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S25F672C8N EP1S25B672C7N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $179.40 $620.15
Family Stratix (EP1S) Stratix
Logic Elements (LE) 25,660 β€”
Process Technology 130 nm CMOS 130 nm
Core Supply Voltage 1.5 V β€”
Embedded Memory 1,944 Kbit (TriMatrix) TriMatrix RAM blocks
DSP Blocks 12 (9-bit x 9-bit multipliers) Yes (dedicated multiplier/accumulator)
PLLs 6 Yes (on-die)
Maximum User I/O 426 β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) 0 Β°C to 85 Β°C (Commercial)
Speed Grade C8 (-8) β€”
Package Type 672-ball FineLine BGA (FBGA) 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch
Package Dimensions 35 x 35 mm, 1.27 mm pitch β€”
Logic Family CMOS CMOS
Maximum Internal Frequency 357.14 MHz β€”
Configuration Passive Serial / Passive Parallel / JTAG / EPC device β€”
RoHS Status Compliant (lead-free N suffix) Compliant (per Intel/Altera product page)
Origin Altera (acquired by Intel, 2015) β€”
Logic Elements / Cells β€” 25660
Number of User I/O β€” 473
Number of Pins β€” 672
Supply Voltage (Core) β€” 1.5 V
Maximum Operating Frequency β€” 420.17 MHz
Mounting Type β€” Surface Mount
Configuration Method β€” SRAM-based, JTAG (IEEE 1149.1)
I/O Standards Supported β€” LVTTL, LVCMOS, LVDS, SSTL, HSTL

Datasheets & Resources

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