EP1S30B956C6 vs EP1S60B956C6 Comparison
Detailed side-by-side comparison of EP1S30B956C6 by Altera and EP1S60B956C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S30B956C6 | EP1S60B956C6 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $78.00 | $339.20 |
| Family | Stratix | β |
| Logic Elements (LEs) | 32,470 | β |
| Logic Array Blocks (LABs) | 3,247 | β |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | β |
| Maximum User I/O | 683 | β |
| Process Technology | 130 nm CMOS | β |
| Core Voltage (VCCINT) | 1.5 V | β |
| Operating Temperature | 0 C to 85 C (Commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | C6 | β |
| Package | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-BBGA, FCBGA (40 x 40 mm) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | β |
| DSP Blocks | Yes (Stratix DSP blocks) | β |
| PLLs | Up to 12 | β |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | β |
| RoHS Status | Not confirmed - pre-RoHS part | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Lead-Free | Unknown | β |
| Series | β | Stratix (EP1S) |
| Logic Elements | β | 57,120 |
| Total RAM Bits | β | 5,215,104 |
| Number of LABs/CLBs | β | 5712 |
| Number of I/O | β | 683 |
| Supplier Device Package | β | 956-BGA (40x40) |
| Core Voltage - Supply | β | 1.425 V to 1.575 V |
| Voltage - Supply | β | 1.425 V to 1.575 V |
| Number of Pins | β | 956 |
| Form of Terminal | β | Ball (BGA) |
| Package Code | β | BGA / FCBGA |