EP1S60B956C6 vs EP1S30B956C6 Comparison

Detailed side-by-side comparison of EP1S60B956C6 by Altera and EP1S30B956C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S60B956C6 EP1S30B956C6
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $339.20 $78.00
Series Stratix (EP1S) β€”
Logic Elements 57,120 β€”
Total RAM Bits 5,215,104 β€”
Number of LABs/CLBs 5712 β€”
Number of I/O 683 β€”
Package 956-BBGA, FCBGA (40 x 40 mm) 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch
Supplier Device Package 956-BGA (40x40) β€”
Mounting Type Surface Mount (BGA) Surface Mount
Operating Temperature 0 C to +85 C (Commercial) 0 C to 85 C (Commercial)
Core Voltage - Supply 1.425 V to 1.575 V β€”
Voltage - Supply 1.425 V to 1.575 V β€”
Number of Pins 956 β€”
Form of Terminal Ball (BGA) β€”
Package Code BGA / FCBGA β€”
RoHS Status [DATA_NEEDED: RoHS status] Not confirmed - pre-RoHS part
Family β€” Stratix
Logic Elements (LEs) β€” 32,470
Logic Array Blocks (LABs) β€” 3,247
Embedded Memory Bits β€” 3,317,184 (approximately 3.4 Mbit)
Maximum User I/O β€” 683
Process Technology β€” 130 nm CMOS
Core Voltage (VCCINT) β€” 1.5 V
Speed Grade β€” C6
Maximum Internal Frequency β€” 450.05 MHz (per family datasheet)
DSP Blocks β€” Yes (Stratix DSP blocks)
PLLs β€” Up to 12
Configuration Modes β€” Passive Serial (PS), Passive Parallel (PP), JTAG
MSL Level β€” [DATA_NEEDED: MSL level]
Lead-Free β€” Unknown

Datasheets & Resources

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