EP1SGX25DF800C5N vs EP1SGX25DF672C5N Comparison
Detailed side-by-side comparison of EP1SGX25DF800C5N by Intel and EP1SGX25DF672C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1SGX25DF800C5N | EP1SGX25DF672C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $158.00 | $1,232.25 |
| Family | Stratix GX | β |
| Device Logic Elements | 25,660 (typical) | β |
| Transceiver Channels | 8 (full-duplex) | β |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | β |
| Process Technology | 130 nm | 130 nm CMOS |
| Supply Voltage (Core) | 1.5 V typical | 1.5 V (1.425 V to 1.575 V) |
| Package | FBGA-800 (FineLine BGA, 31x31 mm) | β |
| Speed Grade | C5 (commercial) | C5 |
| Operating Temperature | 0C to +85C (commercial) | 0 C to 85 C (Commercial) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | β |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | β |
| PLLs | Up to 40 (device-wide) | β |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | β |
| PCI Express Hard IP | x1, x4 endpoints supported | β |
| DSP Blocks | Embedded multiplier blocks (family-wide) | 10 (dedicated 18x18 multipliers) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (FBGA) |
| MSL Level | [DATA_NEEDED: MSL Level] | β |
| Development Software | Quartus II (legacy) | β |
| Series | β | Stratix GX |
| Logic Elements | β | 25,660 LE |
| User I/O Count | β | 455 |
| Total RAM Bits | β | 1,944,576 bits |
| Transceiver Data Rate | β | Up to 3.1875 Gbps |
| Number of Transceivers | β | 20 |
| Package Type | β | 672-ball Flip-Chip BGA (FBGA-672) |
| Package Dimensions | β | 27 mm x 27 mm, 1.0 mm pitch |
| Configuration Modes | β | PS, PPS, FPP, JTAG |
| Lead Free / RoHS | β | Lead free per Altera/Intel datasheet |