EP1SGX25DF800C5N vs EP1SGX25DF800I6N Comparison

Detailed side-by-side comparison of EP1SGX25DF800C5N by Intel and EP1SGX25DF800I6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1SGX25DF800C5N EP1SGX25DF800I6N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $158.00 $1,450.00
Family Stratix GX Stratix GX
Device Logic Elements 25,660 (typical) β€”
Transceiver Channels 8 (full-duplex) 4 to 20 channels
Maximum Transceiver Data Rate 3.1875 Gbps per channel 3.1875 Gbps per channel
Process Technology 130 nm β€”
Supply Voltage (Core) 1.5 V typical β€”
Package FBGA-800 (FineLine BGA, 31x31 mm) 800-pin FineLine BGA (DF800)
Speed Grade C5 (commercial) -6 (production grade)
Operating Temperature 0C to +85C (commercial) β€”
Lead-Free / RoHS Status Lead-free (N suffix) β€”
On-Chip Memory (TriMatrix) Approx. 2 Mbits total β€”
PLLs Up to 40 (device-wide) β€”
Embedded 8b/10b Encoder/Decoder Yes (one per transceiver channel) β€”
PCI Express Hard IP x1, x4 endpoints supported β€”
DSP Blocks Embedded multiplier blocks (family-wide) Up to 22 DSP blocks
Mounting Type Surface Mount (BGA) β€”
MSL Level [DATA_NEEDED: MSL Level] β€”
Development Software Quartus II (legacy) β€”
Logic Elements β€” [DATA_NEEDED: logic element count]
CDR / SERDES β€” Embedded clock-data recovery and SERDES
Memory β€” TriMatrix memory, up to 2 Mbits
Hard IP β€” PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II)
Source-Synchronous Channels β€” 8 channels
I/O Standards β€” LVDS, LVTTL, LVCMOS, SSTL, HSTL
Temperature Range β€” Industrial -40C to +100C
RoHS Status β€” [DATA_NEEDED: RoHS status]
Protocol Support β€” Gigabit Ethernet, SONET/SDH, PCI Express, custom serial

Datasheets & Resources

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