EP1SGX25DF800C6N vs EP1SGX25DF800C5N Comparison
Detailed side-by-side comparison of EP1SGX25DF800C6N by Intel and EP1SGX25DF800C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1SGX25DF800C6N - Stratix GX FPGA, 25K LE, 3.1875 Gbps SERDES | Intel / Altera
EP1SGX25DF800C6N Obsolete
Specification Comparison
| Parameter | EP1SGX25DF800C6N | EP1SGX25DF800C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $118.00 | $158.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,560 LEs | β |
| Maximum Transceiver Channels | 20 channels | β |
| Maximum Transceiver Data Rate | 3.1875 Gbps | 3.1875 Gbps per channel |
| Package | FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code) | FBGA-800 (FineLine BGA, 31x31 mm) |
| Process Node | [DATA_NEEDED: process node] | β |
| Core Voltage | 1.5 V | β |
| Operating Temperature | Commercial (0 C to +85 C) | 0C to +85C (commercial) |
| Speed Grade | 6 | C5 (commercial) |
| Configuration Method | Passive Serial / Passive Parallel / Active Serial / JTAG | β |
| Transceiver Encoding | 8B/10B | β |
| Clock Data Recovery (CDR) | Yes, integrated per channel | β |
| Memory Type | TriMatrix embedded SRAM | β |
| DSP Blocks | Yes, embedded multiplier blocks | Embedded multiplier blocks (family-wide) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Lead Free | [DATA_NEEDED: lead free status] | β |
| Device Logic Elements | β | 25,660 (typical) |
| Transceiver Channels | β | 8 (full-duplex) |
| Process Technology | β | 130 nm |
| Supply Voltage (Core) | β | 1.5 V typical |
| Lead-Free / RoHS Status | β | Lead-free (N suffix) |
| On-Chip Memory (TriMatrix) | β | Approx. 2 Mbits total |
| PLLs | β | Up to 40 (device-wide) |
| Embedded 8b/10b Encoder/Decoder | β | Yes (one per transceiver channel) |
| PCI Express Hard IP | β | x1, x4 endpoints supported |
| MSL Level | β | [DATA_NEEDED: MSL Level] |
| Development Software | β | Quartus II (legacy) |