EP1SGX25DF800I6N vs EP1SGX25CF672I6 Comparison
Detailed side-by-side comparison of EP1SGX25DF800I6N by Intel and EP1SGX25CF672I6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1SGX25DF800I6N - Stratix GX FPGA, 25K LE, 20x 3.1875 Gbps Transceivers | Intel / Altera
EP1SGX25DF800I6N β Last Time Buy
Specification Comparison
| Parameter | EP1SGX25DF800I6N | EP1SGX25CF672I6 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,450.00 | $171.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | [DATA_NEEDED: logic element count] | 25,660 |
| Transceiver Channels | 4 to 20 channels | β |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | β |
| CDR / SERDES | Embedded clock-data recovery and SERDES | β |
| Memory | TriMatrix memory, up to 2 Mbits | β |
| DSP Blocks | Up to 22 DSP blocks | [DATA_NEEDED: DSP block count per Stratix GX device data sheet] |
| Hard IP | PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) | β |
| Source-Synchronous Channels | 8 channels | β |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | β |
| Package | 800-pin FineLine BGA (DF800) | 672-ball FBGA (27 x 27 mm, 1 mm pitch) |
| Speed Grade | -6 (production grade) | β |
| Temperature Range | Industrial -40C to +100C | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free FBGA) |
| Protocol Support | Gigabit Ethernet, SONET/SDH, PCI Express, custom serial | β |
| Logic Array Blocks (LABs) | β | 2,566 |
| Total RAM Bits | β | 1,944,576 |
| User I/O Pins | β | 455 |
| Core Supply Voltage | β | 1.425 V to 1.575 V (1.5 V typical) |
| Process Technology | β | 130 nm CMOS |
| Internal Clock Performance | β | Up to 5000 MHz |
| Mounting Type | β | Surface Mount |
| Operating Junction Temperature | β | -40C to +100C |
| Transceiver Count | β | [DATA_NEEDED: precise number of SERDES channels per pin list] |
| Lead-Free | β | Yes |