EP1SGX25FG1020C4 vs EP1SGX25FG672C7 Comparison

Detailed side-by-side comparison of EP1SGX25FG1020C4 by Altera and EP1SGX25FG672C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1SGX25FG1020C4 EP1SGX25FG672C7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $118.00
Family Stratix GX Stratix GX
Logic Elements 25,560 LE β€”
Embedded Memory 1,920 Kbits β€”
Total RAM Blocks M-RAM + M4K blocks (per Stratix GX architecture) β€”
DSP Blocks 10 (DSP blocks) β€”
Maximum User I/O Pins [DATA_NEEDED: exact pin count from datasheet] β€”
Embedded Transceivers 4 channels Yes (multi-gigabit, up to 3.125 Gbps)
Transceiver Data Rate 600 Mbps to 3.125 Gbps β€”
Core Voltage 1.5 V (typical) 1.5 V
Package 1020-pin FineLine BGA (FBGA), 1.27 mm pitch 672-pin FineLine BGA (FG672)
Operating Temperature 0 Β°C to +85 Β°C (commercial) 0C to +85C (commercial, speed grade C7)
Speed Grade C4 7 (commercial)
Configuration Modes PS, PPS, PPA, JTAG β€”
Process Technology 0.13 Β΅m CMOS, SRAM-based 0.13 micron
Configuration Device Required Yes β€” external (EPC16 / EPCS recommended) β€”
Lifecycle Status Obsolete / Last-time-buy from authorized distributors Obsolete (per Altera/Intel product discontinuance notices)
RoHS Status [DATA_NEEDED: confirm via manufacturer product page] [DATA_NEEDED: RoHS compliance]
Series β€” Stratix
Logic Elements (LE) β€” 25,660
Total RAM Bits β€” 1,944,576 bits
User I/O Pins β€” 455
Number of Transceivers β€” [DATA_NEEDED: exact transceiver count]
PLLs β€” 4
Global Clocks β€” 16
Mounting Type β€” Surface Mount
Configuration Method β€” SRAM-based, JTAG/AS/PS supported

Datasheets & Resources

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