EP1SGX25FG672C7 vs EP1SGX25FF800C5N Comparison

Detailed side-by-side comparison of EP1SGX25FG672C7 by Altera and EP1SGX25FF800C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1SGX25FG672C7 EP1SGX25FF800C5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $118.00 $1,175.00
Family Stratix GX Stratix GX
Series Stratix β€”
Logic Elements (LE) 25,660 β€”
Total RAM Bits 1,944,576 bits β€”
User I/O Pins 455 β€”
Embedded Transceivers Yes (multi-gigabit, up to 3.125 Gbps) β€”
Number of Transceivers [DATA_NEEDED: exact transceiver count] β€”
PLLs 4 8 (4 enhanced + 4 fast)
Global Clocks 16 β€”
Package 672-pin FineLine BGA (FG672) 780-pin FineLine BGA (FBGA-780)
Operating Temperature 0C to +85C (commercial, speed grade C7) 0 C to +85 C (commercial)
Core Voltage 1.5 V 1.5 V
Process Technology 0.13 micron β€”
Mounting Type Surface Mount β€”
Speed Grade 7 (commercial) 5
Configuration Method SRAM-based, JTAG/AS/PS supported β€”
RoHS Status [DATA_NEEDED: RoHS compliance] Compliant (lead-free)
Lifecycle Status Obsolete (per Altera/Intel product discontinuance notices) β€”
Logic Elements β€” 25,660
Embedded RAM β€” 2,243 Kbits
DSP Blocks β€” 10 (16x16 multipliers)
Embedded Multipliers β€” 160 (18x18 equivalent via DSP blocks)
Transceiver Channels β€” 4 full-duplex
Transceiver Data Rate (max) β€” 3.1875 Gbps
Maximum User I/O β€” 426
Process Node β€” 90 nm
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

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