EP20K1000CF33C9ES vs EP20K1000CF33I8N Comparison

Detailed side-by-side comparison of EP20K1000CF33C9ES by Altera and EP20K1000CF33I8N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K1000CF33C9ES EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA

EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA

EP20K1000CF33C9ES ⚠ Last Time Buy

Specification Comparison

Parameter EP20K1000CF33C9ES EP20K1000CF33I8N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $215.00 $210.00
Family APEX-20KC APEX 20KC
Manufacturer Intel (formerly Altera) β€”
Typical Gate Count 1,000,000 system gates β€”
Logic Elements 38,400 38,400 cells
Logic Array Blocks (LABs) 3,840 β€”
Embedded System Blocks (ESBs) 212 β€”
Total Embedded RAM Bits 327,680 bits β€”
Maximum User I/O Pins 708 β€”
Package 1,020-ball FineLine BGA (FBGA) β€”
Speed Grade C9 I8
Operating Temperature 0 C to +85 C (commercial) -40 Β°C to +85 Β°C (industrial)
Process Technology 0.18 um CMOS 0.15 Β΅m CMOS
Logic Element Architecture 4-input LUT with dedicated carry chain β€”
Maximum Embedded RAM per ESB 32,768 bits (dual-port, FIFO support) β€”
Phase-Locked Loops Up to 4 enhanced PLLs β€”
MultiVolt I/O Support 1.8V / 2.5V / 3.3V / 5.0V β€”
JTAG Support IEEE 1149.1 boundary-scan β€”
Configuration Method Passive serial / Passive parallel / JTAG β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free finish status] β€”
System Gates β€” 1,000,000 (approx.)
Maximum Internal Clock Frequency β€” 301.21 MHz
Propagation Delay β€” 1.79 ns
Number of Logic Elements / Cells β€” 38,400
Core Supply Voltage β€” 1.8 V nominal (1.71 V to 1.89 V)
Number of I/O Pins β€” 700 user I/O
Number of Pins β€” 1020
Package Type β€” FC-FBGA-1020 (Flip-Chip Fine-pitch BGA)
Embedded Memory β€” Dual-port RAM via ESB blocks
PLL Count β€” 4
Configuration Interface β€” IEEE 1149.1 JTAG, EPC serial/parallel
Mounting Type β€” Surface Mount

Datasheets & Resources

Browse All Products Create BOM Request Quote