EP20K1000CF672C8ES vs EP20K1000CF672C7 Comparison
Detailed side-by-side comparison of EP20K1000CF672C8ES by Intel and EP20K1000CF672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES β Last Time BuySpecification Comparison
| Parameter | EP20K1000CF672C8ES | EP20K1000CF672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $285.00 | $158.00 |
| Family | APEX 20K (APEX20KE) | APEX 20KC |
| Logic Elements | 38,400 | β |
| Typical Gates | 25,920 | β |
| Maximum System Gates | 1,000,000 | β |
| Embedded Memory (ESB) | 216 Kbits | β |
| User I/O Pins | 508 | β |
| Package | 672-ball FineLine BGA | 672-ball FC-FBGA (45 Γ 45 mm, 1.27 mm pitch) |
| Speed Grade | C8 | C7 (fastest) |
| Operating Temperature | Commercial (0C to +85C) | 0 Β°C to +85 Β°C (commercial, C suffix) |
| Process Technology | 0.18 Β΅m CMOS | 0.15 Β΅m all-layer copper CMOS |
| Core Voltage (VCCINT) | 2.5 V | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 | β |
| PLLs | 4 (ClockLock/ClockBoost) | β |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | β |
| MSL Level | 3 (168 hours) | [DATA_NEEDED: moisture sensitivity level] |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status - part predates common RoHS reporting] |
| Device Type | β | FPGA (Field Programmable Gate Array) |
| System Gates | β | 1,000,000 (typical) |
| Logic Elements / Cells | β | 38400 |
| Maximum Internal Frequency | β | 375.94 MHz |
| Propagation Delay | β | 1.6 ns (typical) |
| Core Supply Voltage | β | 1.8 V |
| User I/O Count | β | 488 (some sources list 508) |
| Embedded Memory (EAB) | β | Embedded array blocks (RAM/CAM/ROM) |
| PLL Count | β | 4 |
| Configuration Interface | β | Passive Serial, JTAG (IEEE 1149.1), Fast Passive Parallel |