EP20K1000CF672C9N vs EP20K1000CF672C7 Comparison
Detailed side-by-side comparison of EP20K1000CF672C9N by Intel and EP20K1000CF672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K1000CF672C9N | EP20K1000CF672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $165.00 | $158.00 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | Loadable PLD / FPGA | FPGA (Field Programmable Gate Array) |
| System Gates | 1,000,000 | 1,000,000 (typical) |
| Logic Elements | 38,400 | β |
| Embedded Memory | 327,680 bits | β |
| Maximum User I/O | 508 | β |
| Core Voltage | 1.8 V | β |
| Process Technology | 0.15 micron all-layer copper CMOS | 0.15 Β΅m all-layer copper CMOS |
| Maximum Frequency | 250 MHz | β |
| Propagation Delay (pin-to-pin) | 1.6 ns | β |
| Package | 672-ball FC-FBGA (flip-chip) | 672-ball FC-FBGA (45 Γ 45 mm, 1.27 mm pitch) |
| Package Body Size | 27 mm x 27 mm | β |
| Ball Pitch | 1.0 mm | β |
| Operating Temperature | 0 C to 85 C (Commercial) | 0 Β°C to +85 Β°C (commercial, C suffix) |
| PLLs | 4 | β |
| Mounting Type | Surface Mount | Surface Mount |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - part predates common RoHS reporting] |
| Logic Elements / Cells | β | 38400 |
| Maximum Internal Frequency | β | 375.94 MHz |
| Propagation Delay | β | 1.6 ns (typical) |
| Core Supply Voltage | β | 1.8 V |
| User I/O Count | β | 488 (some sources list 508) |
| Speed Grade | β | C7 (fastest) |
| Embedded Memory (EAB) | β | Embedded array blocks (RAM/CAM/ROM) |
| PLL Count | β | 4 |
| Configuration Interface | β | Passive Serial, JTAG (IEEE 1149.1), Fast Passive Parallel |
| MSL Level | β | [DATA_NEEDED: moisture sensitivity level] |