EP20K1000EBC652-2X vs EP20K100EBC652-2X Comparison
Detailed side-by-side comparison of EP20K1000EBC652-2X by Altera and EP20K100EBC652-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K1000EBC652-2X
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X NrndAltera
EP20K100EBC652-2X
EP20K100EBC652-2X - APEX 20KE 100K Gate FPGA, 652-BGA | Altera
EP20K100EBC652-2X ObsoleteSpecification Comparison
| Parameter | EP20K1000EBC652-2X | EP20K100EBC652-2X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $99.00 | $85.00 |
| Family | APEX-20KE | APEX 20KE |
| Device Logic Elements | 38,400 | β |
| Typical Gates | 1,000,000 system gates | 100,000 |
| Embedded Memory Bits | 327,680 bits | β |
| User I/O Pins | 488 | β |
| Maximum User I/O | 488 | β |
| Propagation Delay | 1.6 ns | β |
| Internal Maximum Frequency | 350 MHz | β |
| Logic Blocks / Macros | 2,560 macros | β |
| PLLs | 4 | β |
| Core Voltage | 1.8 V | β |
| Process Technology | 0.22 Β΅m (some sources 0.15 Β΅m) all-layer copper-metal CMOS | 0.18 Β΅m CMOS, SRAM-based |
| Package | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) | 652-ball BGA (EBC652) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0C to +85C (commercial) |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Altera configuration | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Maximum System Gates | β | 263,000 |
| Logic Elements | β | 4,160 |
| Embedded System Blocks (ESBs) | β | 26 |
| Maximum RAM Bits | β | 53,248 |
| Maximum User I/O Pins | β | 246 |
| Supply Voltage - Core | β | 1.8 V |
| Supply Voltage - I/O | β | 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | β | -2 (faster commercial) |
| Configuration Method | β | Passive Serial / Passive Parallel / JTAG (EPC) |
| Clock Resources | β | Up to 4 DLLs, multiple global clocks |