EP20K1000EBI652-2 vs EP20K1000EBC652-2X Comparison
Detailed side-by-side comparison of EP20K1000EBI652-2 by Altera and EP20K1000EBC652-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoleteAltera
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X NrndSpecification Comparison
| Parameter | EP20K1000EBI652-2 | EP20K1000EBC652-2X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $105.00 | $99.00 |
| Device Family | APEX 20KE | β |
| Logic Elements | 38,400 | β |
| Typical Gates | 1,000,000 | 1,000,000 system gates |
| Maximum User I/O | 488 | 488 |
| Package | BGA-652 (FineLine BGA, 45 x 45 mm) | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) |
| Ball Pitch | 1.27 mm | β |
| Speed Grade | -2 | β |
| Operating Temperature Range | Industrial -40C to +100C | β |
| Supply Voltage (Core) | 1.8 V | β |
| Process Technology | 0.18 micrometer CMOS, all-layer copper | 0.22 Β΅m (some sources 0.15 Β΅m) all-layer copper-metal CMOS |
| Embedded System Block Memory | [DATA_NEEDED: ESB memory size] | β |
| Embedded Multiplier/Accumulator Blocks | [DATA_NEEDED: number of multiplier blocks] | β |
| Phase-Locked Loops (PLLs) | 4 | β |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | 350 MHz | β |
| Configuration Modes | PS, PPS, PPA, JTAG | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Compliant |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Family | β | APEX-20KE |
| Device Logic Elements | β | 38,400 |
| Embedded Memory Bits | β | 327,680 bits |
| User I/O Pins | β | 488 |
| Internal Maximum Frequency | β | 350 MHz |
| Logic Blocks / Macros | β | 2,560 macros |
| PLLs | β | 4 |
| Core Voltage | β | 1.8 V |
| Operating Temperature | β | 0 Β°C to +85 Β°C (commercial) |
| Configuration Interface | β | JTAG (IEEE 1149.1), Passive Serial, Altera configuration |