EP20K100CB356C7 vs EP20K200CB356C7N Comparison
Detailed side-by-side comparison of EP20K100CB356C7 by Intel and EP20K200CB356C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K100CB356C7
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 β Last Time BuyIntel
EP20K200CB356C7N
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N ObsoleteSpecification Comparison
| Parameter | EP20K100CB356C7 | EP20K200CB356C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $71.00 | $92.00 |
| Manufacturer | Intel (formerly Altera) | β |
| Series | APEX20K | EP20K200 |
| Typical Gates | 100,000 | β |
| Maximum Logic Elements | 53,248 | β |
| User I/O Pins | 252 | β |
| Package | 356-LBGA | 356-ball PBGA (S-PBGA) |
| Embedded Memory (Bits) | 53,248 | β |
| Number of PLLs | 4 | β |
| Core Voltage | 2.5 V | β |
| I/O Standards Supported | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) | β |
| Programming Interface | IEEE 1149.1 JTAG | β |
| Process Technology | 0.18 ΞΌm CMOS | 0.15 um CMOS |
| Operating Temperature | Commercial grade | 0C to +85C (Commercial) |
| Speed Grade | C7 | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Family | β | APEX 20KC |
| System Gates | β | 200,000 |
| Logic Elements / Cells | β | 8,320 |
| Maximum Operating Frequency | β | 3571.6 MHz (internal equivalent) |
| Propagation Delay | β | 1.48 ns |
| User I/Os | β | 263 |
| Input Terminals | β | 267 |
| Supply Voltage (Nominal) | β | 1.8 V |
| Mounting Type | β | Surface Mount |
| Embedded Memory | β | ESBs (dual-port RAM/ROM/FIFO) |
| Clock Management | β | PLL with up to 4 outputs |
| JTAG Support | β | Yes (IEEE 1149.1) |
| In-System Programmable | β | Yes |