EP20K1500CF33C7 vs EP20K1500CF33C8ES Comparison

Detailed side-by-side comparison of EP20K1500CF33C7 by Intel and EP20K1500CF33C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP20K1500CF33C8ES EP20K1500CF33C8ES - 1.5M Gate APEX FPGA 1020-FBGA | Intel

EP20K1500CF33C8ES - 1.5M Gate APEX FPGA 1020-FBGA | Intel

EP20K1500CF33C8ES ⚠ Last Time Buy

Specification Comparison

Parameter EP20K1500CF33C7 EP20K1500CF33C8ES
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $205.00 $288.00
Family APEX 20KC β€”
Series APEX 20KC APEX 20K (APEX 20KE family)
Logic Elements / Cells 51840 β€”
Number of Registers 51840 β€”
Total RAM Bits 442368 β€”
Number of I/O [DATA_NEEDED: exact user I/O count for 1020-BBGA] β€”
Number of Gates 1500000 β€”
Supply Voltage - Core 1.8 V β€”
Supply Voltage - I/O 1.5 V to 3.3 V (bank-dependent) β€”
Speed Grade -7 (fastest commercial) -1 (C8)
Operating Temperature 0C to +85C (commercial) [DATA_NEEDED: operating temperature range]
Package / Case 1020-BBGA (FineLine BGA) β€”
Mounting Type Surface Mount Surface Mount
Configuration Technology SRAM (volatile, reprogrammable) β€”
Embedded Memory ESB dual-port RAM up to 32K x 36 bits/block β€”
PLL Count Up to 4 β€”
LVDS Support Yes β€”
RoHS Status [DATA_NEEDED: RoHS compliance for -7 speed grade] [DATA_NEEDED: RoHS compliance for ES variant]
Manufacturer β€” Intel (formerly Altera)
System Gates β€” 1,500,000
Maximum Gates (Equivalent) β€” 2,392,000
Logic Elements β€” 51,840
Embedded System Block (ESB) Bits β€” 442,368
CAM Bits β€” 216 Kbit
Number of PLLs β€” 4
Number of Clocks β€” 8 clock pins
Maximum User I/O β€” 808 (1020-FBGA)
Package β€” 1020-FBGA (FCBGA), 33x33 mm
Voltage - Supply (Core) β€” 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V)
I/O Standard Support β€” LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt)
JTAG / Boundary Scan β€” IEEE 1149.1 compliant
Programming Interface β€” ByteBlaster / MasterBlaster / Altera USB-Blaster
Sample Tier β€” ES (engineering sample)
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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