EP20K1500CF33C8ES vs EP20K1000CF672C8ES Comparison
Detailed side-by-side comparison of EP20K1500CF33C8ES by Intel and EP20K1000CF672C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K1500CF33C8ES
EP20K1500CF33C8ES - 1.5M Gate APEX FPGA 1020-FBGA | Intel
EP20K1500CF33C8ES β Last Time BuyIntel
EP20K1000CF672C8ES
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES β Last Time BuySpecification Comparison
| Parameter | EP20K1500CF33C8ES | EP20K1000CF672C8ES |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $288.00 | $285.00 |
| Series | APEX 20K (APEX 20KE family) | β |
| Manufacturer | Intel (formerly Altera) | β |
| System Gates | 1,500,000 | β |
| Maximum Gates (Equivalent) | 2,392,000 | β |
| Logic Elements | 51,840 | 38,400 |
| Embedded System Block (ESB) Bits | 442,368 | β |
| CAM Bits | 216 Kbit | β |
| Number of PLLs | 4 | β |
| Number of Clocks | 8 clock pins | β |
| Maximum User I/O | 808 (1020-FBGA) | β |
| Package | 1020-FBGA (FCBGA), 33x33 mm | 672-ball FineLine BGA |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Speed Grade | -1 (C8) | C8 |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | Commercial (0C to +85C) |
| Voltage - Supply (Core) | 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V) | β |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt) | β |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | β |
| Programming Interface | ByteBlaster / MasterBlaster / Altera USB-Blaster | JTAG (IEEE 1149.1 / IEEE 1532) |
| Sample Tier | ES (engineering sample) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance for ES variant] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Family | β | APEX 20K (APEX20KE) |
| Typical Gates | β | 25,920 |
| Maximum System Gates | β | 1,000,000 |
| Embedded Memory (ESB) | β | 216 Kbits |
| User I/O Pins | β | 508 |
| Process Technology | β | 0.18 Β΅m CMOS |
| Core Voltage (VCCINT) | β | 2.5 V |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 |
| PLLs | β | 4 (ClockLock/ClockBoost) |
| MSL Level | β | 3 (168 hours) |