EP20K160EQC240-2 vs EP20K160EQC240-3 Comparison

Detailed side-by-side comparison of EP20K160EQC240-2 by Intel and EP20K160EQC240-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K160EQC240-2 EP20K160EQC240-3
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $108.50 $98.75
Family APEX 20KE APEX 20K
Typical Gates 160,000 160,000
Logic Elements (LEs) 6,400 β€”
Embedded System Blocks (ESBs) 64 β€”
Maximum Embedded Memory 56 Kbits (approx. 7 Kbytes usable) β€”
Maximum User I/O (this package) 175 β€”
Maximum User I/O (largest package) 271 β€”
PLLs 4 β€”
Internal Frequency (max) 160 MHz β€”
Propagation Delay 1.55 ns β€”
Logic Family CMOS β€”
Process Technology 0.18-micron SRAM CMOS 0.18 Β΅m CMOS
Package PQFP-240 (QFP-240, FQFP) 240-pin PowerQuad Flat Pack (BQFP / FQFP)
Pin Count 240 β€”
Mounting Type Surface Mount (Gull Wing) Surface Mount (gull-wing QFP)
Operating Temperature 0 C to 85 C (Commercial) 0 Β°C to +85 Β°C (commercial)
Speed Grade -2 -3 (slowest commercial grade)
Supply Voltage (core) [DATA_NEEDED: core VCC value] β€”
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS β€”
Configuration Modes Passive Serial, Passive Parallel Synchronous, JTAG β€”
JTAG Support IEEE Std. 1149.1 boundary-scan IEEE 1149.1 boundary-scan
RoHS Status Non-compliant (original Altera-era PQFP) unknown
MultiCore Architecture Yes (Logic + ESB + I/O) β€”
5.0 V Tolerance Achievable with external resistor β€”
Series β€” EP20K160E
Maximum System Gates β€” 404,000
Macrocells β€” 640
Logic Elements β€” 4,160
Embedded RAM Bits β€” 53,248
User I/O Pins β€” 175
Core Voltage β€” 1.8 V
I/O Voltage β€” 1.8 V / 2.5 V / 3.3 V (multi-voltage I/O banks)
Configuration Interface β€” Passive Serial, JTAG

Datasheets & Resources

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