EP20K200CF484C7N vs EP20K200CF484C8ES Comparison
Detailed side-by-side comparison of EP20K200CF484C7N by Altera and EP20K200CF484C8ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200CF484C7N - APEX-20K 200K Gates FPGA 484-FBGA | Intel/Altera
EP20K200CF484C7N ObsoleteSpecification Comparison
| Parameter | EP20K200CF484C7N | EP20K200CF484C8ES |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $62.00 | $89.00 |
| Series | APEX-20K | APEX-20KC |
| Logic Elements / Cells | 8,320 | β |
| Total RAM Bits | 106,496 | β |
| Number of Gates (typical) | 200,000 | β |
| Number of I/O | 382 | β |
| Voltage - Supply (VCCINT) | 1.71 V to 1.89 V | β |
| Package / Case | 484-BBGA (FineLine BGA) | β |
| Supplier Device Package | 484-FBGA (23x23 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +85C (commercial grade) | 0C to +85C (commercial) |
| Number of PLLs | 4 | β |
| Embedded Array Blocks (EABs) | Configurable as RAM/ROM/FIFO | β |
| Programmable Logic Blocks | APEX LAB architecture | β |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5V | β |
| Configuration Method | SRAM-based, in-system reconfigurable | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | β |
| Lifecycle Status | Obsolete (Altera/Intel APEX-20K family EOL) | β |
| Family | β | APEX 20K |
| Logic Elements | β | 8,320 |
| System Gates | β | 200,000 |
| Embedded Memory (RAM bits) | β | 106,496 |
| Number of Logic Array Blocks (LABs) | β | 104 |
| Number of Embedded System Blocks (ESBs) | β | 13 |
| User I/O Pins (max) | β | 376 |
| PLLs | β | 4 |
| Core Voltage | β | 1.8 V |
| Speed Grade | β | C8 (-8 commercial) |
| Package | β | 484-pin FBGA (FineLine BGA) |
| Process Node | β | 0.18 micron CMOS |
| Configuration Interface | β | JTAG (IEEE 1149.1) / Altera serial |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP |
| Lead Free / RoHS | β | [DATA_NEEDED: lead-free status] |