EP20K200CQ208C8 vs EP20K100CQ208C8 Comparison
Detailed side-by-side comparison of EP20K200CQ208C8 by Altera and EP20K100CQ208C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K100CQ208C8
EP20K100CQ208C8 - APEX20KE FPGA 100K Gates 208-PQFP | Altera
EP20K100CQ208C8 ObsoleteSpecification Comparison
| Parameter | EP20K200CQ208C8 | EP20K100CQ208C8 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $95.00 | $13.40 |
| Family | APEX 20KC | โ |
| Series | APEX-20Kยฎ | APEX 20KE |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | โ |
| Process Technology | 0.18 ยตm CMOS (0.15 ยตm effective) | โ |
| System Gates | 200,000 | โ |
| Logic Elements | 8,320 | 4,160 |
| Embedded RAM Bits | 106,496 | โ |
| Maximum Internal Frequency | 301.21 MHz | โ |
| Maximum User I/O | 144 | โ |
| Package | 208-pin PQFP / BFQFP (28x28 mm) | 208-PQFP (28x28 mm) |
| Terminal Form | Gull Wing | โ |
| Package Code | FQFP | โ |
| Speed Grade | C8 | C8 |
| Temperature Grade | Commercial | โ |
| Programmability | In-system via JTAG (IEEE 1149.1) | โ |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Typical Gates | โ | 100,000 |
| Maximum System Gates | โ | 263,000 |
| Embedded System Block (ESB) Bits | โ | 53,248 |
| Dedicated RAM Bits | โ | 100,000 |
| Number of PLLs | โ | 4 |
| User I/O Pins | โ | 208 |
| Operating Temperature | โ | 0C to +85C (Commercial) |
| Supply Voltage Core | โ | 1.8 V |
| I/O Standard Support | โ | 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI |
| Configuration Modes | โ | Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG |
| Lead-Free | โ | [DATA_NEEDED: lead-free status] |