EP20K200CQ240C8ES vs EP20K100CQ240C8ES Comparison

Detailed side-by-side comparison of EP20K200CQ240C8ES by Altera and EP20K100CQ240C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP20K100CQ240C8ES EP20K100CQ240C8ES - 189-I/O 240QFP FPGA | Intel

EP20K100CQ240C8ES - 189-I/O 240QFP FPGA | Intel

EP20K100CQ240C8ES Obsolete

Specification Comparison

Parameter EP20K200CQ240C8ES EP20K100CQ240C8ES
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $95.00 $39.60
Family APEX 20KC β€”
Device Logic Elements 8,320 cells β€”
Typical Gates 200,000 β€”
Embedded Memory 106,496 bits β€”
User I/O Count 168 β€”
Maximum Internal Clock Frequency 301.21 MHz β€”
Core Voltage 1.8 V β€”
Process Technology 0.15 Β΅m CMOS β€”
Package 240-BFQFP (PQFP) β€”
Number of Pins 240 β€”
Operating Temperature [DATA_NEEDED: Operating temperature range] β€”
Speed Grade C8 β€”
Device Variant Suffix ES (engineering sample) β€”
PLLs 4 β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance] Unknown - not confirmed in scraped listing
MSL Level [DATA_NEEDED: MSL rating] β€”
Device Type β€” FPGA (Field Programmable Gate Array)
Product Family β€” Intel/Altera EP20K series FPGA family
Number of Logic Elements / Cells β€” 4,160
Total RAM Bits β€” 53,248 bits
Number of User I/O β€” 189
Package / Case β€” 240-BFQFP / QFP-240
Package Type β€” Quad Flat Package
Packaging β€” Tray
Ordering/ Speed Grade Suffix β€” C8ES
Stock Quantity β€” 4,816 pieces per Heisener listing
Lead Time β€” To Be Confirmed
Unit Price β€” Request a Quote
Minimum Operating Temperature β€” [DATA_NEEDED: minimum operating temperature]
Maximum Operating Temperature β€” [DATA_NEEDED: maximum operating temperature]
Core / I/O Supply Voltage β€” [DATA_NEEDED: VCCINT and VCCIO voltage]
Supported I/O Standards β€” [DATA_NEEDED: supported I/O standards]
Differential I/O Pairs β€” [DATA_NEEDED: number of differential I/O pairs]
Configuration Schemes β€” [DATA_NEEDED: supported configuration schemes]

Datasheets & Resources

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