EP20K200EBC652-2X vs EP20K1000EBC652-2X Comparison

Detailed side-by-side comparison of EP20K200EBC652-2X by Altera and EP20K1000EBC652-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K200EBC652-2X

EP20K200EBC652-2X - 8320 LEs APEX-20KE FPGA 652-BGA | Altera

EP20K200EBC652-2X Nrnd
Altera
EP20K1000EBC652-2X

EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)

EP20K1000EBC652-2X Nrnd

Specification Comparison

Parameter EP20K200EBC652-2X EP20K1000EBC652-2X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $99.00
Series APEX-20KEยฎ โ€”
Family APEX-20KE APEX-20KE
Device Logic Elements 8,320 38,400
Number of LABs/CLBs 832 โ€”
Total RAM Bits 106,496 โ€”
Number of I/O Pins 376 โ€”
Number of Gates 200,000 (typical) โ€”
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) โ€”
Operating Temperature (TJ) 0C to +85C โ€”
Package 652-BGA 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch)
Mounting Type Surface Mount Surface Mount
Process Technology 0.18 um CMOS 0.22 ยตm (some sources 0.15 ยตm) all-layer copper-metal CMOS
I/O Standard Support LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL โ€”
Configuration Method Serial or Parallel PROM, JTAG (IEEE 1149.1) โ€”
Lead-Free / RoHS Compliant (per DigiKey listing) โ€”
Typical Gates โ€” 1,000,000 system gates
Embedded Memory Bits โ€” 327,680 bits
User I/O Pins โ€” 488
Maximum User I/O โ€” 488
Propagation Delay โ€” 1.6 ns
Internal Maximum Frequency โ€” 350 MHz
Logic Blocks / Macros โ€” 2,560 macros
PLLs โ€” 4
Core Voltage โ€” 1.8 V
Operating Temperature โ€” 0 ยฐC to +85 ยฐC (commercial)
Configuration Interface โ€” JTAG (IEEE 1149.1), Passive Serial, Altera configuration
RoHS Status โ€” Compliant

Datasheets & Resources

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