EP20K200EBC652-3 vs EP20K1000EBC652-2X Comparison

Detailed side-by-side comparison of EP20K200EBC652-3 by Intel and EP20K1000EBC652-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200EBC652-3 EP20K1000EBC652-2X
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $210.00 $99.00
Family APEX-20KE APEX-20KE
Logic Elements (LEs) 8,320 β€”
Logic Array Blocks (LABs) 832 β€”
Total RAM Bits 106,496 β€”
Maximum User I/O Pins 376 β€”
Embedded System Blocks (ESBs) Yes (dual-port RAM / ROM / CAM) β€”
PLLs 4 4
Package 652-ball FineLine BGA (top-side, 1.27 mm pitch) 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +85C (EBC - Enhanced Commercial) 0 Β°C to +85 Β°C (commercial)
Speed Grade -3 β€”
Configuration Mode JTAG / PS / Passive-serial / Passive-parallel β€”
Process Node [DATA_NEEDED: process node] β€”
Core Voltage [DATA_NEEDED: core voltage] 1.8 V
RoHS Status Not RoHS (non-lead-free variant) Compliant
Lifecycle Status Obsolete - last time-buy period closed β€”
Device Logic Elements β€” 38,400
Typical Gates β€” 1,000,000 system gates
Embedded Memory Bits β€” 327,680 bits
User I/O Pins β€” 488
Maximum User I/O β€” 488
Propagation Delay β€” 1.6 ns
Internal Maximum Frequency β€” 350 MHz
Logic Blocks / Macros β€” 2,560 macros
Process Technology β€” 0.22 Β΅m (some sources 0.15 Β΅m) all-layer copper-metal CMOS
Configuration Interface β€” JTAG (IEEE 1149.1), Passive Serial, Altera configuration

Datasheets & Resources

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