EP20K200RC208-3 vs EP20K200RC208-3N Comparison
Detailed side-by-side comparison of EP20K200RC208-3 by Intel and EP20K200RC208-3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200RC208-3N - APEX 20K FPGA 200K Gates 8320 Cells 167MHz | Altera
EP20K200RC208-3N ObsoleteSpecification Comparison
| Parameter | EP20K200RC208-3 | EP20K200RC208-3N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $95.00 | $39.00 |
| Series | APEX 20K | APEX 20K |
| Family | APEX-20Kยฎ | APEX-20K |
| Logic Elements / Cells | 8,320 | โ |
| Total System Gates | 200,000 | โ |
| Embedded Memory (bits) | 106,496 | โ |
| Number of I/O Pins | 144 | โ |
| Package | 208-RQFP Exposed Pad (BFQFP) | โ |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | 0.22 ยตm CMOS | 0.22 um CMOS |
| Core Voltage | 1.8 V | โ |
| I/O Standard | LVDS (3.3 V / 2.5 V) | โ |
| Maximum Operating Frequency | 167 MHz | 167 MHz |
| PLLs | 4 | โ |
| Speed Grade | -3 | โ |
| Operating Temperature | -40ยฐC to +85ยฐC (Industrial) | โ |
| Programming Interface | IEEE 1149.1 JTAG | โ |
| In-System Programmable | Yes | โ |
| Hot Socketing | Yes | โ |
| RoHS Status | Compliant | โ |
| Logic Elements | โ | 8320 cells |
| System Gates | โ | 200,000 |
| Embedded Memory | โ | 106,496 bits |
| User I/O Pins | โ | 144 |
| Dedicated Inputs | โ | 4 |
| Core Supply Voltage | โ | 2.5 V |
| I/O Standard Support | โ | LVDS, 1.8V APEX-20KE family |
| Package Type | โ | 208-RQFP / BFQFP with exposed pad |
| Terminal Pitch | โ | 0.5 mm |
| Operating Temperature Range | โ | 0C to +85C (industrial) |
| Propagation Delay | โ | 3.6 ns |
| Architecture | โ | MultiCore (LUT + product-term + embedded memory) |