EP20K200RC208-3N vs EP20K200RC208-1X Comparison
Detailed side-by-side comparison of EP20K200RC208-3N by Altera and EP20K200RC208-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200RC208-3N - APEX 20K FPGA 200K Gates 8320 Cells 167MHz | Altera
EP20K200RC208-3N ObsoleteSpecification Comparison
| Parameter | EP20K200RC208-3N | EP20K200RC208-1X |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $39.00 | $35.80 |
| Family | APEX-20K | APEX-20KE |
| Series | APEX 20K | β |
| Logic Elements | 8320 cells | 8,320 cells |
| System Gates | 200,000 | β |
| Embedded Memory | 106,496 bits | β |
| Maximum Operating Frequency | 167 MHz | β |
| User I/O Pins | 144 | β |
| Dedicated Inputs | 4 | β |
| Process Technology | 0.22 um CMOS | 0.18 Β΅m CMOS |
| Core Supply Voltage | 2.5 V | β |
| I/O Standard Support | LVDS, 1.8V APEX-20KE family | β |
| Package Type | 208-RQFP / BFQFP with exposed pad | β |
| Terminal Pitch | 0.5 mm | β |
| Operating Temperature Range | 0C to +85C (industrial) | β |
| Propagation Delay | 3.6 ns | β |
| Architecture | MultiCore (LUT + product-term + embedded memory) | β |
| Mounting Type | Surface Mount | Surface Mount (gull-wing leads) |
| Typical Gate Count | β | 200,000 gates |
| Embedded RAM Bits | β | 106,496 bits |
| Embedded RAM Blocks (ESBs) | β | 4 lanes / 52 ESBs |
| Maximum User I/O Pins | β | 144 (PQFP-208 variant) |
| Core Voltage | β | 1.8 V (Β±5%) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+ |
| Speed Grade | β | -1X (1.8 V core, PQFP-208 pinout) |
| Package | β | 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch |
| Operating Temperature | β | 0 Β°C to +85 Β°C (commercial) |
| Configuration Interface | β | IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices |
| MultiCore Architecture | β | LUT logic + product-term logic + embedded memory |
| PLL Count | β | 4 enhanced PLLs (with programmable phase shift) |
| RoHS Status | β | Compliant (lead-free PQFP package) |
| Moisture Sensitivity Level | β | MSL 3 (per JEDEC J-STD-020, applicable to PQFP) |