EP20K200RC208-3V vs EP20K200RC208-1X Comparison

Detailed side-by-side comparison of EP20K200RC208-3V by Altera and EP20K200RC208-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K200RC208-3V EP20K200RC208-3V FPGA - APEX-20K 8320 LE, 144 I/O | Altera

EP20K200RC208-3V FPGA - APEX-20K 8320 LE, 144 I/O | Altera

EP20K200RC208-3V βœ“ Active

Specification Comparison

Parameter EP20K200RC208-3V EP20K200RC208-1X
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $35.80
Series APEX-20K β€”
Number of Logic Elements / Cells 8320 β€”
Number of Gates 200000 typical β€”
Total RAM Bits 106496 β€”
Number of User I/Os 144 β€”
Supply Voltage Range 2.375 V to 2.625 V β€”
Maximum Internal Frequency 167 MHz β€”
Process Technology 0.22 um 0.18 Β΅m CMOS
Package / Case 208-BFQFP Exposed Pad β€”
Supplier Device Package 208-RQFP (28x28) β€”
Number of Pins 208 β€”
Mounting Type Surface Mount Surface Mount (gull-wing leads)
Core Architecture MultiCore, combining LUT logic, product-term logic, and embedded memory β€”
Interconnect Four-level hierarchical FastTrack Interconnect β€”
Operating Temperature Range [DATA_NEEDED: operating temperature range] β€”
Speed Grade [DATA_NEEDED: exact speed grade suffix interpretation] -1X (1.8 V core, PQFP-208 pinout)
RoHS Status [DATA_NEEDED: RoHS status] Compliant (lead-free PQFP package)
Core Supply Current [DATA_NEEDED: core supply current] β€”
Configuration Interface [DATA_NEEDED: configuration interface details] IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices
Family β€” APEX-20KE
Logic Elements β€” 8,320 cells
Typical Gate Count β€” 200,000 gates
Embedded RAM Bits β€” 106,496 bits
Embedded RAM Blocks (ESBs) β€” 4 lanes / 52 ESBs
Maximum User I/O Pins β€” 144 (PQFP-208 variant)
Core Voltage β€” 1.8 V (Β±5%)
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+
Package β€” 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch
Operating Temperature β€” 0 Β°C to +85 Β°C (commercial)
MultiCore Architecture β€” LUT logic + product-term logic + embedded memory
PLL Count β€” 4 enhanced PLLs (with programmable phase shift)
Moisture Sensitivity Level β€” MSL 3 (per JEDEC J-STD-020, applicable to PQFP)

Datasheets & Resources

Browse All Products Create BOM Request Quote