EP20K30EFC144-3N vs EP20K30EFC144-2X Comparison

Detailed side-by-side comparison of EP20K30EFC144-3N by Altera and EP20K30EFC144-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K30EFC144-2X EP20K30EFC144-2X - 30K Gate APEX 20K FPGA | Altera

EP20K30EFC144-2X - 30K Gate APEX 20K FPGA | Altera

EP20K30EFC144-2X Obsolete

Specification Comparison

Parameter EP20K30EFC144-3N EP20K30EFC144-2X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $64.00 $58.50
Family APEX 20K β€”
Typical Gates 30,000 30,000 gates
Logic Elements (Cells) 1,200 β€”
Embedded Memory (RAM bits) 24,576 β€”
User I/Os 408 β€”
Pin Count 144 β€”
Package Type 144-LBGA (FineLine BGA) β€”
Speed Grade -3 -2X
Internal Frequency (max) 160 MHz β€”
Propagation Delay (typical) 1.68 ns β€”
Process Technology 0.22 Β΅m CMOS 0.22 um
Core Supply Voltage 1.8 V 1.8 V
Operating Temperature 0 Β°C to 85 Β°C (commercial) β€”
Architecture MultiCore (LUT + product-term + ESB) β€”
Configuration Memory SRAM (volatile, requires boot PROM) β€”
Mounting Type Surface Mount Surface Mount
RoHS Status unknown unknown
Device Family β€” Altera APEX 20K
Device Type β€” Loadable programmable logic device (FPGA/CPLD hybrid)
Number of Logic Elements / Cells β€” 1,200 cells (third-party parametric listing)
Number of Macrocells β€” 192
Number of User I/O β€” 93
Number of Terminals β€” 144
Terminal Form β€” Ball
Package Code β€” LBGA / 144-FBGA
Package Shape β€” Square
Operating Temperature Range β€” [DATA_NEEDED: exact operating temperature range]
Embedded RAM Bits β€” [DATA_NEEDED: embedded memory size]
Supported I/O Standards β€” [DATA_NEEDED: supported I/O standards]
Configuration Schemes β€” [DATA_NEEDED: supported configuration schemes]

Datasheets & Resources

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