EP20K30EQC208-1 vs EP20K30EQC208-2 Comparison
Detailed side-by-side comparison of EP20K30EQC208-1 by Altera and EP20K30EQC208-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K30EQC208-1
EP20K30EQC208-1 - APEX 20KE FPGA 1.8V 208-PQFP | Altera
EP20K30EQC208-1 ObsoleteIntel
EP20K30EQC208-2
EP20K30EQC208-2 - APEX 20KE FPGA, 30K Gates, 208-PQFP | Intel
EP20K30EQC208-2 NrndSpecification Comparison
| Parameter | EP20K30EQC208-1 | EP20K30EQC208-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $34.90 | $7.92 |
| Series | APEX-20KE | β |
| Family | FPGA APEX 20K Family | APEX 20KE |
| Number of Logic Elements/Cells | 1200 | β |
| Number of Gates | 30000 (30K gates) | β |
| Number of Macro Cells | [DATA_NEEDED: Number of macro cells] | β |
| Total RAM Bits | 24576 | β |
| Number of User I/O | 125 | β |
| Voltage - Supply | 1.71 V to 1.89 V | β |
| Core Voltage | 1.8 V | β |
| Technology | 0.22 um | β |
| Package / Case | 208-BFQFP | β |
| Supplier Device Package | 208-PQFP (28x28) | β |
| Package Code | FQFP | β |
| Terminal Form | Gull wing | β |
| Number of Terminals | 208 | β |
| Terminal Pitch | 0.50 mm | β |
| Package Shape | Square | β |
| Mounting Type | Surface Mount | Surface Mount (PQFP with gull-wing leads) |
| Speed Grade | -1 | -2 (2.69 ns pin-to-pin) |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Device Logic | β | FPGA (SRAM-based) |
| Typical Gates | β | 30,000 |
| Logic Elements | β | 1,200 |
| Embedded Memory (RAM bits) | β | 24,576 |
| Maximum User I/O | β | 125 |
| Dedicated Inputs | β | 4 |
| Package | β | 208-BFQFP (PQFP-208) |
| Core Supply Voltage | β | 1.71 V to 1.89 V |
| I/O Standard | β | LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank) |
| Maximum Clock Frequency | β | 160 MHz |
| Propagation Delay | β | 2.69 ns |
| Configuration Interface | β | IEEE 1149.1 JTAG, Passive serial, Active serial |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| Process Technology | β | 1.8 V CMOS, MultiCore architecture |
| MSL Level | β | [DATA_NEEDED: MSL rating] |